The present application relates to semiconductor device fabrication, and more particularly to the integration of Group III nitride materials with a silicon substrate.
Group III nitride compounds, such as gallium nitride (GaN) and its related alloys, are a unique group of semiconductor materials that can be used in a wide variety of applications such as optoelectronics, photovoltaics and lighting. The large bandgap and high electron saturation velocity of the Group III nitride compounds also make them excellent candidates for applications in high temperature and high-speed power electronics.
Many electronics applications incorporate both silicon and Group III nitride circuits due to their unique performance characteristics. The silicon circuits are typically CMOS circuits used for digital signals, and the Group III nitride circuits are used for microwave, millimeter wave or optical signals. This integration can be realized by forming silicon CMOS devices and Group III nitride devices on a common silicon-on-insulator substrate, in which the CMOS devices are formed on an upper silicon layer having a (100) crystallographic orientation, while the Group III nitride devices are formed on a bottom silicon layer having a (111) crystallographic orientation. However, since epitaxial growth of Group III nitride compounds on a (111) silicon layer is typically performed at a relatively high temperature (e.g., 700° C.-1200° C.), the high deposition temperatures cause diffusion of Group III elements into the silicon substrate, which may lead to the deterioration of CMOS device performance. Although diffusion barriers can be employed to prevent the Group III elements from diffusing into the silicon substrate, such diffusion barriers typically do not possess good growth selectivity towards Group III nitride compounds. Methods for integrating Group III nitride materials with a silicon substrate are thus needed to solve the above discussed problems.